Resistance change memory

Details Resistance change memory Resistance change memory

2011-03-01

2011-03-01

Dinh, Son (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S171000, C365S173000

Reexamination Certificate

active

07898845

ABSTRACT:
A resistance change memory includes first and second memory cell arrays which are adjacent to each other in a first direction, first and second reference cell arrays paired with the first and second memory cell arrays, a first sense amplifier shared by the first and second memory cell arrays and arranged between the first and second memory cell arrays, a first data bus which transfers data of a first readout cell in the first memory cell array to the first sense amplifier, and a second data bus which transfers data of a first reference cell in the first reference cell array to the first sense amplifier. The first and second data buses run on both sides of the first sense amplifier in a second direction and cross each other while sandwiching the first sense amplifier.

REFERENCES:
patent: 5695864 (1997-12-01), Slonczewski
patent: 7505307 (2009-03-01), Ueda
J. DeBrosse, et al., “A 16Mb MRAM Featuring Bootstrapped Write Drivers,” 2004 Symposium on VLSI Circuits Digest of Technical Papers, 2004, pp. 454-457.

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