Resistance calibration circuit in semiconductor device

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Details

C326S032000, C326S034000

Reexamination Certificate

active

06927600

ABSTRACT:
The present invention relates to a resistance calibration circuit to correct a resistance variation in an output terminal of a semiconductor device. The resistance calibration circuit according to the present invention includes: a correction code generator for generating a plurality of push-up code signals and a plurality of pull-down code signals based on an external reference resistor, wherein a reference voltage is applied to the correction code generator; a push-up decoder for decoding the plurality of push-up code signals from the correction code generator; a pull-down decoder for decoding the plurality of pull-down code signals from the correction code generator; and a resistance adjustor for receiving a push-up signal from the push-up decoder and a pull-down signal from the pull-down decoder and for turning on/off a plurality of inner transistors.

REFERENCES:
patent: 5331501 (1994-07-01), Shimp
patent: 6329139 (2001-12-01), Nova et al.
patent: 6466487 (2002-10-01), Otsuka
patent: 6509778 (2003-01-01), Braceras et al.
patent: 2002/0163355 (2002-11-01), van Bavel et al.
patent: 02-040567 (1990-02-01), None
patent: 04-015932 (1992-01-01), None
patent: 05-029937 (1993-02-01), None
patent: 07-169277 (1995-07-01), None
patent: 2002-12407 (2004-12-01), None

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