Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated
Reexamination Certificate
2000-08-04
2002-11-05
Clark, Jasmine J B (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
C257S790000, C257S723000
Reexamination Certificate
active
06476507
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a resin sealing method and a resin sealing apparatus for electrically connecting electrodes provided on a substrate and a semiconductor chip fixed to the substrate with each other and thereafter sealing the semiconductor chip and the substrate with resin, and more particularly, it relates to a resin sealing method and a resin sealing apparatus excellent in workability.
2. Description of the Prior Art
In recent years, miniaturization is strongly required to a package having a semiconductor chip. Therefore, the so-called CSP (chip size package) is widely employed. Further, a BOC (board on chip) type CSP is employed in order to minimize the lengths of wires in the package for satisfying requirement for a high-speed operation of an electronic apparatus. In the BOC type CSP, a substrate having an opening is placed on a semiconductor chip so that a pad provided on the upper surface of the substrate is connected with a pad provided on the upper surface of the semiconductor chip through the opening with a wire or a metal strip.
Conventional resin sealing employed for a BOC type CSP is now described with reference to FIG.
11
.
FIG. 11
is a sectional view showing a finished product, i.e., a package sealed with resin by a conventional resin sealing method and a conventional resin sealing apparatus. As shown in
FIG. 11
, a semiconductor chip
100
is fixed to a substrate
102
with an adhesive tape
101
. A wire
103
electrically connects a pad (not shown) of the semiconductor chip
100
with a pad (not shown) of the substrate
102
through an opening provided in the substrate
102
. The pad of the substrate
102
is electrically connected with an external terminal
104
, and a solder bump
105
, i.e., a protruding electrode is provided on the external terminal
104
for transmitting/receiving signals to/from an external device. Further, the pads provided on the semiconductor chip
100
and the substrate
102
respectively and the wire
103
connecting these pads with each other are covered with sealing resin
106
hardened after potting.
The package shown in
FIG. 11
is generally prepared in the following manner: First, the adhesive tape
101
is aligned with and stuck on the substrate
102
. Then, the substrate
102
and the semiconductor chip
100
are aligned with each other and thereafter fixed to each other with the adhesive tape
101
. Then, the pads of the substrate
102
and the semiconductor chip
100
are electrically connected with each other by wire bonding, i.e., with the wire
103
through the opening of the substrate
102
. The opening of the substrate
102
is potted with molten resin for covering a connected portion formed by the pads of the substrate
102
and the semiconductor chip
100
and the wire
103
with a dispenser, and thereafter hardened for forming the sealing resin
106
and sealing the connected portion. Finally, the solder bump
105
is formed on the external terminal
104
of the substrate
102
.
According to the conventional resin sealing method and the conventional resin sealing apparatus described above, however, each semiconductor chip
100
is potted with molten resin and hence the efficiency of resin sealing is hard to improve. While the efficiency of resin sealing can be improved by simultaneously using a plurality of dispensers, the resin sealing apparatus is remarkably complicated in this case.
In order to pot the connected portion, further, the viscosity of the molten resin must be reduced to some extent. Therefore, the molten resin spreads to lower dimensional accuracy in resin sealing. Further, the area required for resin sealing is increased to disadvantageously hinder miniaturization of the package.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a resin sealing method and a resin sealing apparatus capable of manufacturing a miniature package in high precision by forming a cavity around a connected portion where pads of a semiconductor chip and a substrate are electrically connected with each other by closing molds, injecting molten resin into the cavity and hardening the same thereby efficiently sealing the package with resin.
In order to attain the aforementioned object, a resin sealing method according to an aspect of the present invention, fixing a substrate having an opening to a semiconductor chip with first and second mold portions arranged in a manner where a mold surface of the first mold portion is opposite to a mold surface of the second mold portion, electrically connecting an electrode provided on the semiconductor chip with an electrode provided on the substrate through the opening by a metal conductor including a metal thin wire or a metal strip previously provided on the substrate and thereafter sealing prescribed portions of the substrate and/or the semiconductor chip, comprises steps of placing the substrate on the second mold portion for storing a connected portion including each electrode and the metal conductor in a cavity provided on the mold surface of the first mold portion, closing the first mold portion and the second mold portion for thereafter injecting molten resin into the cavity and hardening the molten resin, and opening the first mold portion and the second mold portion and thereafter taking out the substrate having the semiconductor chip sealed thereto on the connected portion.
According to this method, resin sealing can be performed in excellent dimensional accuracy with a small occupied area by defining a cavity around the connected portion formed by the electrodes of the semiconductor chip and the substrate and the metal thin wire or the metal strip by closing the first and second mold portions, injecting molten resin into the cavity and hardening the same.
In an embodiment of this resin sealing method, the semiconductor chip is further stored in another cavity provided on the mold surface of the second mold portion in the step of placing the substrate on the second mold portion, and the molten resin is injected also into the cavity provided on the mold surface of the second mold portion and hardened in the hardening step.
According to this step, the molten resin is also injected into and hardened in the cavity provided on the second mold portion for storing the semiconductor chip, whereby resin sealing can be performed to cover the semiconductor chip. Therefore, the semiconductor chip can be inhibited from chipping after the resin sealing.
A resin sealing method according to another aspect of the present invention, fixing a plurality of semiconductor chips to a substrate having one or a plurality of openings with first and second mold portions arranged in a manner where a mold surface of the first mold portion is opposite to a mold surface of the second mold portion, electrically connecting electrodes provided on the plurality of semiconductor chips with an electrode provided on the substrate through the opening(s) by a metal conductor including a metal thin wire or a metal strip previously provided on the substrate and thereafter sealing prescribed portions of the substrate and/or each of said semiconductor chip areas, comprises steps of placing the substrate on the second mold portion while directing the plurality of semiconductor chips downward for storing a connected portion including each electrode and the metal conductor in a cavity provided on the mold surface of the first mold portion, closing the first mold portion and the second mold portion for thereafter injecting molten resin into the cavity and hardening the molten resin, and opening the first mold portion and the second mold portion and thereafter taking out the substrate having the plurality of semiconductor chips sealed thereto in each connected portion.
According to this resin sealing method, a plurality of semiconductor chips are fixed to a single substrate and a cavity is defined around the connected portion formed by the electrodes of each semiconductor chip and the substrate and the metal thin wire or the metal st
Clark Jasmine J B
Fasse W. F.
Fasse W. G.
Towa Corporation
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