Residue removal process for forming inter-level insulating layer

Details Residue removal process for forming inter-level insulating layer Residue removal process for forming inter-level insulating layer

1998-11-17

2000-10-10

Bowers, Charles

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438780, 438778, H01L 2130, H01L 213105

Patent

active

06130171&

ABSTRACT:
A polymer of parylene is desirable as an inter-level insulating layer in semiconductor circuits because of its small dielectric constant. However, dimers and monomers of parylene in the source gas are taken into the deposited polymer layer during the deposition. These residual dimers and monomers outgas during the deposition of silicon oxide over the polymer layer, which tends to result in peeling from the polymer layer. In order to prevent the silicon dioxide layer from peeling from the resultant semiconductor structure, the polymer layer is annealed before deposition of the silicon oxide for first releasing the residual dimers and monomers from the polymer layer.

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