Semiconductor device manufacturing: process – Substrate or mask aligning feature
Reexamination Certificate
2005-07-05
2005-07-05
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Substrate or mask aligning feature
C438S401000, C438S462000
Reexamination Certificate
active
06914017
ABSTRACT:
The present invention includes a residue-free overlay target, as well as a method of forming a residue-residue free overlay target. The residue-free overlay target of the present invention is defined by trenches or pads including a series of raised lines. The raised lines included in the overlay target of the present invention substantially eliminate any surface topography, such as depressions, at the top surface of overlying material layers, and, thereby, prevent accumulation of process residue which may obscure the overlay target and inhibit further processing. The method of the present invention may be accomplished and modified using process technology known in the semiconductor fabrication art and includes providing a semiconductor substrate, depositing a resist layer, patterning the resist, and executing a wet or dry etch to create at least one overlay target according to the present invention.
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Baluswamy Pary
Bossart Tim H.
DeBoer Scott J.
Roberts Ceredig
Micro)n Technology, Inc.
Pham Long
Pizarro-Crespo Marcos D.
TraskBritt
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