Resetting arrangement for a semiconductor integrated circuit dev

Details Resetting arrangement for a semiconductor integrated circuit dev Resetting arrangement for a semiconductor integrated circuit dev

1988-06-28

1990-01-16

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

For complementary information

36518904, G11C 700

Patent

active

048948047

ABSTRACT:
A semiconductor integrated circuit device having a semiconductor memory wherein part of the operation of a half precharge circuit is stopped by a reset signal, complementary data lines are set to high and low levels and a plurality of word lines are simultaneously brought into a selection state in order to effect a reset operation at a high speed.

REFERENCES:
patent: 4150441 (1979-04-01), Ando
patent: 4625298 (1986-11-01), Sumi
patent: 4758990 (1988-07-01), Uchida

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