Resettable bistable circuit

Details Resettable bistable circuit Resettable bistable circuit

1978-11-06

1981-06-23

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307221C, 307225C, 307451, H03K 3286, H03K 3353

Patent

active

042753163

ABSTRACT:
A resettable D type flip flop for integrated circuit counter circuits, which flip flop comprises master and slave flip flop stages. The slave flip flop stage includes NOR and an INVERTER circuit selectively coupled via a first transmission gate to form a latch or via a second transmission gate to accept new data. The master flip flop stage having an output terminal coupled to apply signal to the slave includes a NOR circuit having an input and its output terminals directly connected to the output and input terminals respectively of a second INVERTER circuit. The NOR is selectively energized to complete a latch circuit or inactivated to permit input data to be applied to an interconnection at its output terminal via a third inverter having an input connected to a DATA input terminal for receiving input signal and which third INVERTER is selectively energized to render it alternately active and inactive.

REFERENCES:
patent: 3829712 (1974-08-01), Hama
patent: 3964031 (1976-06-01), Eaton, Jr.
patent: 4057741 (1977-11-01), Piquet
patent: 4101790 (1978-07-01), Ebihara et al.
Digital Integrated Circuits, CD4060B, RCA File No. 1120, RCA Solid State Division, pp. 1-3, 8/78.

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