Reset dominant level-shift circuit for noise immunity

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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Details

327198, 327166, H03K 190175

Patent

active

055149812

ABSTRACT:
The logic circuit of the level shifting circuit of a high side MOS gate device is made reset dominant to make the circuit immune to noise glitches. The reset dominance is obtained by causing a reset signal to be produced at a wider range of high side floating supply offset voltage than that at which the set signal can be produced to prevent the chance of a set when the high side power MOSFET should be off. The reset dominance is obtained by increasing the size of the reset voltage dropping resistor or by adjusting the input threshold of the circuit reading the set and reset voltage dropping resistors.

REFERENCES:
patent: 4694256 (1987-09-01), Kawamura
patent: 4940904 (1990-07-01), Lin
patent: 5105099 (1992-04-01), Routh et al.
patent: 5305271 (1994-04-01), Watanabe
patent: 5406140 (1995-04-01), Wert

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