Reset circuit for flipflop

Details Reset circuit for flipflop Reset circuit for flipflop

1998-11-10

2000-11-14

Wambach, Margaret R.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327143, 327544, H03K 300

Patent

active

061475378

ABSTRACT:
In order to prevent the value of a flipflop from being indefinite during a period from a power-on time to the time a first clock signal is inputted, a reset circuit for a flipflop is configured to supply a clock to a clock input terminal of each of flipflops at the power-on time, so that an output of each flipflop never becomes indefinite. For example, in the case that an input/output of tristate buffers coinected in common to the same bus are controlled by a corresponding number of flipflops, respectively, a pass-through current caused for an output collision on the bus can be prevented with a relatively small scale of circuit.

REFERENCES:
patent: 5469099 (1995-11-01), Konishi
patent: 5604713 (1997-02-01), Short et al.

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