Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2011-04-05
2011-04-05
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711SE12039
Reexamination Certificate
active
07921261
ABSTRACT:
A method of operating a data processing system includes each of multiple tasks within a parallel job executing on multiple nodes of the data processing system issuing a respective system call to request reservation, without allocation of backing storage in physical memory, of a global address space defined by a range of effective addresses as global shared memory accessible to all of the multiple tasks within the parallel job. At least two of the tasks within the parallel job allocate global address spaces including a same effective address.
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Peyton, T., Office Action dated Mar. 10, 2010; U.S. Appl. No. 12/024,695.
Blackmore Robert S.
Rajamony Ramakrishnan
Dillon & Yudell LLP
International Business Machines - Corporation
Kim Matt
Verderamo, III Ralph A
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