Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2011-05-17
2011-05-17
Patel, Hetul (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S147000, C712S029000
Reexamination Certificate
active
07945741
ABSTRACT:
A computer readable medium is provided embodying instructions executable by a processor to perform a method for performing a transaction including a transaction head and a transaction tail, the method includes executing the transaction head, including executing at least one memory reserve instruction to reserve a transactional memory location that are accessed in the transaction and executing the transaction tail, wherein the transaction cannot be aborted due to a data race on that transactional memory location while executing the transaction tail, wherein data of memory write operations to the transactional memory location is committed without being buffered.
REFERENCES:
patent: 6275907 (2001-08-01), Baumgartner et al.
patent: 2008/0256073 (2008-10-01), Detlefs et al.
Shen Xiaowei
Strauss Karin
F. Chau & Associates LLC
Fishburn John P
International Business Machines - Corporation
Morris, Esq. Daniel P.
Patel Hetul
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