Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1998-10-09
2001-11-20
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S686000
Reexamination Certificate
active
06320255
ABSTRACT:
This invention relates to the fabrication and assembly of semiconductor chips and modules, and more particularly to methods and apparatus for manufacturing customized rerouting metallization. Commercial and military systems today are placing increasing demands on flexible application as well as simplified manufacturing.
BACKGROUND OF THE INVENTION
Semiconductor devices have been prepared in the past using various combinations of metallization processes for rerouting connections to the circuit contact pads. They generally consist of first depositing thin layers of metal and later removing those portions which are not needed for the desired network. This add-and-subtract method is generally costly and involves hazardous materials and often chemical waste; it also tends to lower the process yield due to repeated handling of the chips, and may also generate stress in the chips themselves. The feature sizes achievable for rerouting remain severely limited, and the choice of metals which can be processed is restricted. When insulating layers have to be deposited, existing technology requires extra care for protecting those parts of the chip, which should not receive any deposition, such as the circuit contact pads, amounting to a cumbersome and time consuming deposition process. On the other hand, commercial and military systems urgently require flexible, cost-effective methods for mass producing rerouted semiconductors chips which are compatible with the increasing demands for more signal input/outputs and power handling, and are able to hold pace with quickly changing design rules and feature sizes.
Techniques have been investigated to use laser energy for direct deposition of metals and other solids from the gas phase. The incident laser energy causes photodecomposition or photolysis of the metal-containing component in the gaseous phase. Selective heating of substrate areas definded by incident focussed laser beams has been used to initiate reactions of gaseous precursors, resulting in the deposition of the desired solid reation product. The studies investigated not only the composition of the gases and the properties of different lasers, but also the effect of inorganic and organic substrates, adhesion, the possible need of seeding before deposition, and the required temperatures. Most of these investigations have been for research or specialty product development purposes. For example, the local deposition of aluminum and silicon nitride has been descibed in U.S. Pat. No. 4,340,617, July 1982, Deutsch et al.; deposition of palladium in U.S. Pat. No. 4,574,095, March 1986, Baum et al.; deposition of silicon dioxide, tungsten, molybdenum and titanium in U.S. Pat. No. 4,699,801, October 1987, Ito et al . . . The deposition of gold has been investigated by T. H. Baum in “Laser Chemical Vapor Deposition of Gold”, J. Electrochem.Soc. vol. 134, pp, 2616-2619, 1987; the deposition of copper by F. A. Houle, et al, in “Laser Chemical Vapor Deposition of Copper”, Appl. Phys. Lett. vo. 46, pp. 204-206, 1985; by J. Han et al., in “Combined Experimental and Modeling Studies of Laser-assisted Chemical Vapor Deposition of Copper . . . ”, J. Appl. Phys. vol 75 (4), pp. 2240-2250, 1994; the deposition of tungsten and copper lines has been described by R. F. Miracky in “Laser Advance into Microelectronics Packaging”, Laser Focus World vol. 27, pp.85-98, 1991.
It has been demonstrated that achievable laser focus is compatible with the feature sizes in semiconductor assembly and packaging (10 to 20 &mgr;m), and that the cost of laser application is lower than comparable mature mechanical machines. The goal, however, of offering for the commercial and military markets cost-effective, reliable, rerouted semiconductor products, manufacured in high volume and with flexible, low-cost production methods, has remained elusive, until now.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a plurality of semiconductor devices for application in memory, digital signal processing, microprocessor and other commercial and military products requiring flexibility, cost-effectiveness, and high reliability; secondly a process aiming at high flexibility, reduced number of process steps and process time, and low-cost manufacturability; and thirdly an apparatus for simplifying selected steps of the process.
It is an object of the present invention to provide a flexible and low-cost method and system for rerouting the connections to the circuit contact pads.
Another object of the present invention is to provide a method of expanding the scope of chip application by generating a network of multilevel interconnections.
Another object of the present invention is to maximize device characteristics by selectively depositing localized paths of insulators, and of conductors of various sheet resistance.
Another object of the present invention is to expand assembly options by employing various metal/solder combinations.
Another object of the present invention is to provide a simplified technology for covering the edge sides of the chips in preparation for flexible and reliable extension of the reroute network across the edge sides.
Another object of the present invention is to provide an efficient, flexible, economical, environment-friendly, mass producible technology for dense interconnection and assembly of semiconductor chips.
These objects have been achieved by a flexible mass-production process using a combination of sequential vapor depositions of insulators and various metals onto selected and narrowly defined areas of the chips. Various combinations have been employed for the circuit surfaces as well as edge sides of the chips, and have been successfully used for producing customized conductor patterns for assembling multi-chip cubes or chips-onto-substrate products.
The technical advance represented by the invention, as well as the objects thereof, will become apparent from the following description of a preferred embodiment of the invention when considered in conjunction with the accompanying drawings and the novel features set forth in the appended claims.
REFERENCES:
patent: 5892287 (1999-04-01), Hoffman et al.
Beene Gary L.
Drummond John David
Terrill Robert Earl
Honeycutt Gary C.
Navarro Arthur I.
Potter Roy
Telecky Fred
Texas Instruments Incorporated
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