Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-07-05
2011-07-05
Gu, Shawn X (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S156000, C711S204000, C711S221000
Reexamination Certificate
active
07975108
ABSTRACT:
A request tracking data prefetch apparatus for a computer system is described. The apparatus includes a prefetcher coupled to a memory of the computer system. A tracker is coupled to the prefetcher, and is configured to recognize an access to a plurality of cache lines of the memory by a processor of the computer system. A cache memory is coupled to the prefetcher. The prefetcher predictively loads a target cache line of the memory into the cache memory. The target cache line for the predictive load is indicated by the tracker.
REFERENCES:
patent: 5694568 (1997-12-01), Harrison et al.
patent: 5941981 (1999-08-01), Tran
patent: 6081868 (2000-06-01), Brooks
patent: 6449697 (2002-09-01), Beardsley et al.
patent: 6625696 (2003-09-01), Willke, II
patent: 6678795 (2004-01-01), Moreno et al.
patent: 6742085 (2004-05-01), Hill et al.
patent: 6813693 (2004-11-01), Chilimbi
patent: 6820173 (2004-11-01), Bittel et al.
patent: 7065630 (2006-06-01), Ledebohm et al.
patent: 2002/0073405 (2002-06-01), Chilimbi
Microsoft Computer Dictionary, 2002, Microsoft Press, Fifth Edition, p. 304.
Gaudet Dean
Holscher Brian
LandOfFree
Request tracking data prefetcher apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Request tracking data prefetcher apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Request tracking data prefetcher apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2704115