Request and completion queue load balancing

Details Request and completion queue load balancing Request and completion queue load balancing

2006-09-19

2006-09-19

An, Meng-Al T. (Department: 2195)

Electrical computers and digital processing systems: virtual mac

Task management or control

Process scheduling

C710S052000

Reexamination Certificate

active

07111301

ABSTRACT:
An apparatus comprising a first circuit, a second circuit, and a third circuit. The first circuit may be configured to generate a request count in response to a request head pointer and a request tail pointer. The second circuit may be configured to generate a completion count in response a completion head pointer and a completion tail pointer. The third circuit may be configured to prioritize an interrupt in response to the request and completion counts.

REFERENCES:
patent: 5437032 (1995-07-01), Wolf et al.
patent: 5671365 (1997-09-01), Binford et al.
patent: 5872972 (1999-02-01), Boland et al.
patent: 6269390 (2001-07-01), Boland
patent: 6449701 (2002-09-01), Cho
patent: 6721874 (2004-04-01), Le et al.
patent: 6725296 (2004-04-01), Craddock et al.

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