Reproduction error correction circuit for a video reproduction s

Details Reproduction error correction circuit for a video reproduction s Reproduction error correction circuit for a video reproduction s

1994-07-26

1996-12-24

Tran, Thai Q.

Motion video signal processing for recording or reproducing

Local trick play processing

With randomly accessible medium

386 20, 386 47, 386 90, H04N 989, H04N 595, H04N 578, H04N 988

Patent

active

055878040

ABSTRACT:
A reproduction error correction circuit for a video reproduction system includes a line-storage memory for temporarily storing composite video signal samples, which memory is operated to provide both for time-base correction and for drop-out compensation. The memory is cyclically supplied sequential write addresses descriptive of pixel locations along a horizontal scan line, generated at a rate that tracks any jitter in the input video signal selectively used for writing over the previous contents of the memory. The memory is cyclically supplied sequential read addresses offset 1/2 scan line from the write addresses, generated at a stable rate equal to an average over several scan lines of the rate at which write addresses are generated. This provides for time-base error correction. When a drop-out is detected, overwriting of video signal samples already stored in the single line-storage memory is prohibited. This type of overwrite protection implements automatic replacement of the video signal during periods when drop-out is detected. The phase of the chrominance signal component of the delayed video used for drop-out compensation is adjusted, however, when necessary, to correspond to that required in the replacement signal.

REFERENCES:
patent: 3631429 (1971-12-01), King
patent: 4287529 (1981-09-01), Tatami et al.
patent: 5233437 (1993-08-01), Tachibana et al.
patent: 5285288 (1994-02-01), Takahashi et al.

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