Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-03-25
2008-03-25
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
11025747
ABSTRACT:
A method and system are described for generating a performance prediction report to assist finalizing a partitioning scheme of a block diagram model. Providing a user-defined partitioning scheme and information describing a target hardware platform used in that partitioning scheme, the present invention can generate a performance prediction report by analyzing the computational characteristics of the block diagram model.
REFERENCES:
patent: 6647508 (2003-11-01), Zalewski et al.
patent: 6862696 (2005-03-01), Voas et al.
patent: 7007183 (2006-02-01), Rawson, III
patent: 7051309 (2006-05-01), Crosetto
patent: 2004/0111710 (2004-06-01), Chrakadhar et al.
Galijasevic Zijad
Koh David
Orofino, II Donald Paul
Tat Binh
The MathWorks, Inc.
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