Repairable wafer scale integration system

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

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Details

257668, 257686, 257726, 257778, H01L 2353, H01L 2312

Patent

active

057985650

ABSTRACT:
An apparatus for integrating wafer scale semiconductor integrated circuits and interfacing them with other systems. A wafer, partial wafer, die or plurality of same are mated to a printed circuit board (PCB) which electrically contacts the pads on each die using small conductive pillars. The PCB in turn is connected easily to other electronic systems. The entire apparatus is incorporated into other systems which utilize the dice in the apparatus. The apparatus may be fitted with heating elements and cooling channels to generate the necessary dice temperatures for burn-in, testing, and operation. The apparatus is easily adaptable to include more dice in a stacked configuration.

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patent: 4660123 (1987-04-01), Hermann
patent: 4682270 (1987-07-01), Whitehead et al.
patent: 4710852 (1987-12-01), Keen
patent: 4849857 (1989-07-01), Butt et al.
patent: 5138434 (1992-08-01), Wood et al.
patent: 5223741 (1993-06-01), Bechtel et al.
patent: 5570032 (1996-10-01), Atkins et al.

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