Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2000-07-06
2001-05-22
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S200000, C365S225700, C365S230080
Reexamination Certificate
active
06236599
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a repair signal generating circuit which is mounted onto a semiconductor integrated circuit and generates a repair signal for instructing that a malfunction occurring in a fabricating process of the semiconductor integrated circuit be replaced by a redundant circuit.
BACKGROUND OF THE INVENTION
Very fine processing is progressing due to the development of recent semiconductor process techniques. Accordingly, the degree of integration of semiconductor integrated circuits is also increasing abruptly which leads to an increase in the circuit scale. Moreover, recently, in order to produce effects such that an increase in a memory and low power consumption, a logic circuit and a large-scale memory device are mounted together onto one semiconductor chip.
When large-scale system circuits are mounted onto one semiconductor chip, a small area of a system substrate and low power consumption at the time of mounting a semiconductor device in a system apparatus can be attained. However, from the viewpoint of the fabrication of a semiconductor integrated circuit, the transistor density per unit area increases, and the chip area also increases. Accordingly, the defect factor of the wafer increases thereby causing deterioration of yield of the semiconductor chip.
Therefore, in the case where a portion of the circuit on a semiconductor chip, for example, a portion of the memory circuit is defectively produced in the fabricating process, a redundant circuit having a function equivalent to the defective circuit is previously mounted onto the same semiconductor chip, and a part of the redundant circuit is replaced with the defective circuit by a switching circuit. Sometimes the defective circuit is completely replaced with the redundant circuit. As a result, the defective circuit is not used, therefore, the yield of the semiconductor chip is improved.
As a method of replacing the defective circuit with the redundant circuit, there exists a laser trimming method utilizing a fuse, for example. One terminal of a fuse is connected with a power supply of a semiconductor integrated circuit or a ground node, and the other terminal is connected with a repair signal generating circuit which generates a repair signal. This repair signal indicates whether or not a defective circuit is replaced.
In the laser trimming method, a semiconductor integrated circuit is first tested, and when a defective portion or defective block is identified, a fuse of the specified defective portion or block is cut by a laser trimming device. When the fuse is cut, the repair signal generating circuit is actuated so that a repair signal output from the repair signal generating circuit is inverted. The defective portion or block is replaced with a redundant circuit having a function equivalent to the defective portion or block based on the inverted repair signal so that the yield of the large-scale semiconductor integrated circuit is improved.
FIG. 5
is a diagram showing a configuration of a conventional repair signal generating circuit using a fuse. This repair signal generating circuit outputs a high level repair signal OUT when a fuse
103
is connected, and outputs a low level repair signal OUT when the fuse
103
is cut.
As shown in
FIG. 5
, when the fuse
103
is connected, that is, is not cut, since the grounded fuse
103
is connected with an input of an inverter
104
, a low level signal is input into the inverter
104
. Accordingly, the inverter
104
outputs a high level signal. The output of the inverter
104
is output as the repair signal OUT and also input into a gate of a p-channel transistor
102
. When the high level signal from the inverter
104
is input into the gate of the p-channel transistor
102
, the p-channel transistor
102
becomes OFF.
In this state, when the fuse
103
is cut by the laser trimming device or the like, the input side of the inverter
104
becomes a floating node which is electrically isolated. Here, when power is supplied to the semiconductor integrated circuit to which this repair signal generating circuit is mounted, one terminal of a capacitor
101
is dragged abruptly to a high level, that is, electric charge from the capacitor
101
is discharged, and an electric charge which corresponds to the discharge of the electric charge is again allocated and simultaneously the electric potential changes at the node of the inverter
104
on the input side.
When the node of the input side of the inverter
104
is at high level once, the inverter
104
outputs a low level signal, and the low level repair signal is input into the gate of the p-channel transistor
102
so that the p-channel transistor
102
becomes ON. When the p-channel transistor
102
is ON, the voltage level of a power supply Vcc, that is, the high level repair signal is input into the inverter
104
, and thereafter the p-channel transistor
102
is maintained in the ON state so as to serve as a latching circuit in which the low level repair signal output from the inverter
104
is held.
As a result, in the case where the fuse
103
is not cut, the repair signal generating circuit outputs the high level repair signal to a not shown switching circuit, and in the case where the fuse
103
is cut, outputs the low level repair signal to the switching circuit.
However, in the above-mentioned conventional repair signal generating circuit, since capacitance of a capacitor
101
is raised by the cutting of the fuse
103
, the voltage of the input side of the inverter
104
is not sufficiently raised depending on whether the repair signal generating circuit is fabricated well or poorly. Accordingly, there arises a problem that the cut state of the fuse
103
cannot be detected securely.
In addition, when the fuse
103
is not cut completely, a very weak electric current flows in the fuse
103
, and the power consumption cannot be lowered.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a repair signal generating circuit outputting a repair signal which represents whether a fuse is cut, relieving a circuit having a defective portion securely, and lowering power consumption.
In order to achieve the above object, a repair signal generating circuit according to one aspect of the present invention comprises a power supply; a first p-channel transistor, which first p-channel transistor having a source, a gate, and a drain, wherein said source is connected with said power supply, and a reset signal is input into said gate; a fuse whose one terminal is grounded; an n-channel transistor, which n-channel transistor having a source, a gate, and a drain, wherein said source is connected with the other terminal of said fuse, the reset signal is input into said gate, and said drain is connected with said drain of said first p-channel transistor; a second p-channel transistor, which second p-channel transistor having a source, a gate, and a drain, wherein said source is connected with said power supply, said drain is connected with a node between said commonly connected drains of said first p-channel transistor and said n-channel transistor, said second p-channel transistor having an on-resistance higher than that of said n-channel transistor; and an inverter, which inverter having an input terminal and an output terminal, wherein said input terminal is connected with the node between said commonly connected drains of said first p-channel transistor and said n-channel transistor, and said output terminal is connected with the gate of said second p-channel transistor, said inverter outputting a repair signal from said output terminal.
According to the above invention, initialization is carried out in such a manner that when a reset signal representing the reset-on state is input into the gates of the first p-channel transistor and n-channel transistor, an electric potential level obtained by inverting the reset signal is generated at the node, and the closed loop which is composed of the second p-channel transistor and the inverter latches the electric potential
Elms Richard
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Tuan T.
LandOfFree
Repair signal generating circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Repair signal generating circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Repair signal generating circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2505298