Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2008-04-15
2008-04-15
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000, C365S230030
Reexamination Certificate
active
07359260
ABSTRACT:
A memory device has at least one sub array of memory cells having data columns and at least one spare sub array having spare columns. In one embodiment the sub array of memory cells and the sub array having spare columns are the same sub array. Individual elements in the sub arrays of memory cells can be repaired using an individual element from the spare sub array.
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Analog Devices Inc.
Le Toan
Marger Johnson & McCollom PC
Phung Anh
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