Removal of photoresist and residue from substrate using...

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Removal of imaged layers

Reexamination Certificate

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C430S311000, C430S331000

Reexamination Certificate

active

06500605

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of removal of photoresist and residue from a substrate. More particularly, the present invention relates to the field of removal of photoresist and residue from a substrate using supercritical carbon dioxide.
BACKGROUND OF THE INVENTION
Semiconductor fabrication uses photoresist in ion implantation, etching, and other processing steps. In the ion implantation steps, the photoresist masks areas of a semiconductor substrate that are not implanted with a dopant. In the etching steps, the photoresist masks areas of the semiconductor substrate that are not etched. Examples of the other processing steps include using the photoresist as a blanket protective coating of a processed wafer or the blanket protective coating of a MEMS (micro electro-mechanical system) device.
Following the ion implantation steps, the photoresist exhibits a hard outer crust covering a jelly-like core. The hard outer crust leads to difficulties in a photoresist removal.
Following the etching steps, remaining photoresist exhibits a hardened character that leads to difficulties in the photoresist removal. Following the etching steps, photorcsist residue mixed with etch residue coats sidewalls of etch features. Depending on a type of etching step and material etched, the photoresist residue mixed with the etch residue presents a challenging removal problem since the photoresist residue mixed with the etch residue often strongly bond to the sidewalls of the etch features.
Typically, in the prior art, the photoresist and the photoresist residue are removed by plasma ashing in an O
2
plasma followed by stripping in a stripper bath.
FIG. 1
illustrates an n-p-n FET (field effect transistor) structure
10
subsequent to an ion implantation and prior to a photoresist removal. The n-p-n FET structure
10
includes a source region
12
, a gate region
14
, and a drain region
16
with isolation trenches
18
separating the n-p-n FET structure
10
from adjacent electronic devices. A first photoresist
20
masks all but the source and drain regions,
12
and
16
. In the ion implantation, a high energy ion source implanted an n-dopant into the source and drain regions,
12
and
16
. The high energy ion source also exposed the first photoresist
20
to the n-dopant which creates a hard crust on an upper surface
22
of the first photoresist
20
. In the prior art, the first photoresist
20
is removed by the plasma ashing and the stripper bath of the prior art.
FIG. 2
illustrates a first via structure
30
of the prior art subsequent to an RIE (reactive ion etching) etch and prior to a photoresist and residue removal. The first via structure
30
includes a via
32
which is etched into a first SiO
2
layer
34
to a first TiN layer
36
. In the first via structure
30
, the via
32
stops at the first TiN layer
36
because the first TiN layer
36
provides an etch stop for the RIE etch of the first SiO
2
layer
34
. Etching through the first TiN layer
36
complicates the RIE etch by requiring an additional etch chemistry for the first TiN layer
36
; so for this particular etch, the TiN layer
36
is not etched. The first TiN layer
36
lies on a first Al layer
38
, which lies on a first Ti layer
40
. A first residue, which comprises photoresist residue
42
mixed with SiO
2
etch residue
44
, coats sidewalls
46
of the via
32
. Second photoresist
48
remains on an exposed surface
50
of the first SiO
2
layer
34
. In the prior art, the second photoresist
48
, the photoresist residue
42
, and the SiO
2
etch residue
44
are removed using the plasma ashing and the stripper bath of the prior art.
Note that specific layer materials and specific structure described relative to the first via structure
30
, and to other thin film structures discussed herein, are illustrative. Many other layer materials and other structures are commonly employed in semiconductor fabrication.
FIG. 3
illustrates a second via structure
60
of the prior art subsequent to the RIE etch and prior to the photoresist and residue removal. The second via structure
60
includes a second via
62
which is etched through the first SiO
2
layer
34
and the first TiN layer
36
to the first Al layer
38
. By etching through the first TiN layer
36
, a device performance is improved because a contact resistance with the first Al layer
38
is lower than the contact resistance with the first TiN layer
36
. The second via structure
60
also includes the first Ti layer
40
. The first residue, which comprises the photoresist residue
42
mixed with the SiO
2
etch residue
44
, coats second sidewalls
64
of the second via
62
. A second residue, which comprises the photoresist residue
42
mixed with TiN etch residue
66
, coats the first residue. The second photoresist
48
remains on the exposed surface
50
of the first SiO
2
layer
34
. In the prior art, the second photoresist
48
, the photoresist residue
42
, the SiO
2
etch residue
44
, and the TiN etch residue
66
are removed using the plasma ashing and the stripper bath of the prior art.
Note that the first residue (
FIGS. 2 and 3
) and the second residue (
FIG. 3
) are worst case scenarios. Depending upon a specific etch process, the first residue or the second residue might not be present.
FIG. 4
illustrates a metal line structure
70
subsequent to a metal RIE etch and prior to a residue removal. The metal line structure
70
includes a second TiN layer
72
on a second Al layer
74
which is on a second Ti layer
76
. The second TiN layer
72
, the second Al layer
74
, and the second Ti layer
76
form a metal line. The second Ti layer
76
contacts a W via
78
, which in turn contacts the first Al layer
38
. The W via
78
is separated from the first SiO
2
layer
34
by a sidewall barrier
80
. A third residue, which comprises a halogen residue
82
mixed with metal etch residue
84
, lies on the exposed surface
50
of the first SiO
2
layer
34
. The third residue, which comprises the halogen residue
82
and the metal etch residue
84
, also lies on a second exposed surface
86
of the second TiN layer
72
. A fourth residue, which comprises a combination of the photoresist residue
42
mixed with metal etch residue
84
, coats sides
88
of the metal line. Skirts
90
of the fourth residue extend above the second exposed surface
86
of the second TiN layer
72
. In the prior art, the photoresist residue
42
, the halogen residue
82
, and the metal etch residue
84
are removed using the plasma ashing and the stripper bath of the prior art.
FIG. 5
illustrates a dual damascene structure
100
of the prior art subsequent to a dual damascene RIE etch and prior to the photoresist and photoresist residue removal. The dual damascene structure
100
includes a dual damascene line
102
formed above a dual damascene via
104
. The dual damascene line
102
is etched through a second SiO
2
layer
106
and a first SiN layer
108
. The dual damascene via
104
is etched through a third SiO
2
layer
110
and a second SiN layer
112
. The dual damascene via is etched to an underlying Cu layer
114
.
In processing subsequent to the photoresist and residue removal, exposed surfaces of the dual damascene line and via,
102
and
104
, are coated with a barrier layer and then the dual damascene line and via,
102
and
104
, are filled with Cu.
Returning to
FIG. 5
, a fifth residue, which comprises the photoresist residue
42
mixed with the SiO
2
etch residue
44
, coats line sidewalls
116
and via sidewalls
118
. A sixth residue, which comprises the photoresist residue
42
mixed with SiN etch residue
120
, coats the fifth residue. A seventh residue, which comprises the photoresist residue
42
mixed with Cu etch residue
122
, coats the sixth residue. The photoresist
48
remains on a second exposed surface of the second SiO
2
layer
106
. In the prior art, the photoresist
48
, the photoresist residue
42
, the SiO
2
etch residue
44
, the SiN etch residue
120
, and the Cu etch residue
122
are re

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