Removable processor board having first, second and third level c

Details Removable processor board having first, second and third level c Removable processor board having first, second and third level c

1997-03-31

1998-10-27

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711 3, 711138, 36523003, G06F 1208, G06F 1212

Patent

active

058290273

ABSTRACT:
A computer system which utilizes processor boards including a first level cache system integrated with the microprocessor, a second level external cache system and a third level external cache system. The second level cache system is a conventional, high speed, SRAM-based, writeback cache system. The third level cache system is a large, writethrough cache system developed using conventional DRAMs as used in the main memory subsystem of the computer system. The three cache systems are arranged between the CPU and the host bus in a serial fashion. Because of the large size of the third level cache, a high hit rate is developed so that operations are not executed on the host bus but are completed locally on the processor board, reducing the use of the host bus by an individual processor board. This allows additional processor boards to be installed in the computer system without saturating the host bus. The third level cache system is organized as a writethrough cache. However, the shared or exclusive status of any cached data is also stored. If the second level cache performs a write allocate cycle and the data is exclusive in the third level cache, the data is provided directly from the third level cache, without requiring an access to main memory, reducing the use of the host bus.

REFERENCES:
patent: 5214765 (1993-05-01), Jensen
patent: 5251308 (1993-10-01), Frank et al.
patent: 5276832 (1994-01-01), Holman, Jr.
patent: 5388072 (1995-02-01), Matick et al.
patent: 5539893 (1996-07-01), Thompson et al.
4CDRAM Applications, published by Mitsubishi Electronic Device Group, p. 30 (date unknown).
Preliminary Spec. (Rev. 2.0) M5M44409TP-10,-12,-15,-20, published by Mitsubishi Electric, pp. 1-52 (Apr. 15, 1992).

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