Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-03-26
2009-12-29
Elmore, Stephen C (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000, C711S146000, C711S156000
Reexamination Certificate
active
07640401
ABSTRACT:
In one embodiment, a first node comprises at least one memory request source and a node controller coupled to the memory request source. The node controller comprises a remote hit predictor configured to predict a second node to have a coherent copy of a block addressed by a memory request generated by the memory request source, and the node controller is configured to issued a speculative probe to the second node responsive to the prediction and to the memory request.
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Advanced Micro Devices , Inc.
Elmore Stephen C
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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