Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1997-04-02
1999-02-16
Pham, Chi H.
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
370235, 370236, 375356, H04L 2536, H04L 2540, H04L 700
Patent
active
058728236
ABSTRACT:
First and second data sources transmit a data signal on a data connection and a transmit clock signal on a clock connection. The data signal is clocked into a FIFO resident in the network interface equipment in response to the transmit clock signal, and out of the FIFO to the network in response to a reference clock signal. The FIFO generates a signal indicating how full it is and a local clock generator which generates the transmit clock signal in response to this status indication signal. The first and second data sources hold the data signal and transmit clock signal high for longer than a single period of the reference clock signal when switching between them. The local clock generator alters an average rate of the transmit clock signal in response to the status indication signal from the FIFO in order to keep it half-full.
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Bayard Emmanuel
Martin Roger W.
Miller Russell B.
Pham Chi H.
Rouse Thomas R.
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