Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2005-05-18
2008-10-28
Tran, Anh Q (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S093000, C326S098000
Reexamination Certificate
active
07443205
ABSTRACT:
Circuits and techniques to, during a lower power state, power down combinational logic and to maintain power to storage elements associated with the combinational logic. By powering down the combinational logic gates, leakage current may be reduced and state, or other, values to be used for subsequent operations may be maintained in the storage elements.
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Marvell International Ltd.
Tran Anh Q
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