Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2000-06-01
2002-06-04
Flynn, Nathan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S668000, C257S688000, C257S737000, C257S738000, C257S779000
Reexamination Certificate
active
06400033
ABSTRACT:
BACKGROUND
1. Technical Field
This invention relates generally to semiconductor packaging and mounting, and particularly, to a method and apparatus for reinforcing the solder connections of semiconductor devices.
2. Related Art
An increasing demand for electronic equipment that is smaller, lighter, and more compact has resulted in a concomitant demand for semiconductor packages that have smaller outlines and mounting “footprints.”
One response to this demand has been the development of so-called “chip-size,” or “chip-scale” semiconductor packages (“CSPs”), i.e., packages that are virtually the same size as the integrated circuit (“IC”) die, or “chip,” packaged therein.
Another response has been the development of the so-called “flip-chip” method of attachment of semiconductor chips to substrates. Sometimes referred to as the “Controlled Collapse Chip Connection,” or “C
4
,” method, the technique involves forming balls of a conductive metal, e.g., solder or gold, on the input/output pads on the active surface of the chip, then inverting, or “flipping” the chip over and “reflowing” the conductive balls, i.e., heating them to the melting point, to fuse them to corresponding connection pads on a substrate.
Yet another response has been the development of so-called ball grid array (“BGA”), land grid array (“LGA”), and lead-less chip carrier (“LCC”) versions of CSPs that “surface mount” to an associated printed circuit board (“PCB”) with solder connections, and that have a mounting footprint equal to the outline of the package. The BGA package, for example, mounts and electrically connects to a PCB with a plurality of solder balls in a manner similar to that used for the fli-chip mounting of a semiconductor chip to a substrate described above, and is sometimes referred to as the “C
5
” method.
While these types of die and package mounting and connection techniques have provided a satisfactory response to the demand for smaller packages having lower profiles and smaller mounting footprints, their use in certain applications has resulted in some problems. In particular, where a C
4
or a C
5
method is used to mount and connect a die or a semiconductor package to a substrate that is subject to repeated and/or excessive bending or flexure, such as in portable devices, e.g., laptops, cellular phones, and calculators, the repeated bending of the substrate results in stresses in the solder connections between the package and the substrate that can cause the connections to fail and thereby result in equipment malfunctions.
One solution to this problem has been to “underfill” the narrow space between the bottom surface of the die or package and the surface of the substrate upon which the die or package mounts with a liquid epoxy resin that, when cured, forms a rigid structure that prevents or resists local bending of the substrate, and hence, the stresses on the solder connections associated therewith. However, the underfill process is relatively complex and expensive, and is considered a “non-standard” process for a typical surface-mount assembly line, especially since the spaces between the packages and the PCB must be underfilled one at a time.
Hence, a reliable, inexpensive method and apparatus are needed for reinforcing the solder connections of C
4
-mounted dies and C
5
-mounted semiconductor packages.
BRIEF SUMMARY
This invention provides a reliable method and apparatus for reinforcing the solder connections between a C
4
-mounted semiconductor die or a C
5
-mounted semiconductor package and a substrate to which the die or package is mounted. The method includes the provision of a rigid frame having a central opening through it. The frame has a planar top surface, a bottom surface opposite and parallel to the top surface, and a controlled thickness between the top and bottom surfaces that is equal to the distance between the bottom surface of the die or package and the substrate to which the die or package is mounted.
In one embodiment, the top surface of the frame is attached to a bottom surface of a die or a semiconductor package at the peripheral edges thereof and outside of the plurality of input/output terminals thereon.
The bottom surface of the frame is attached to the top surface of the substrate to which the die is mounted, or in the case of a semiconductor package, to the surface of the PCB to which the package is mounted. In one embodiment, the bottom surface of the frame is bonded to the substrate or PCB with a heat-curing adhesive, or is reflowed thereto simultaneously with the C
4
solder connection of the die to the substrate, or the C
5
solder connection of the semiconductor package to the PCB, respectively.
The rigid frame is thus sandwiched between the die or package and the substrate, and serves to reinforce the C
4
or C
5
solder connections between the die or the package and the substrate against the stresses acting on the connections with flexure of the substrate, thereby eliminating the need to underfill the die or package.
A better understanding of the above and other features and advantages of the invention may be had from a consideration of the detailed description below of some exemplary embodiments thereof, particularly if such consideration is made in conjunction with the appended drawings.
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Amkor Technology Inc.
Flynn Nathan
Forde Remmon R.
Parsons James E.
Skjerven Morrill LLP
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