Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-05-03
2011-05-03
Bragdon, Reginald G (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S136000, C711S143000, C711SE12022
Reexamination Certificate
active
07937531
ABSTRACT:
In one embodiment, a processor regularly writes one or more cache entries back to memory to reduce the likelihood of cache soft errors. The regularly occurring write backs operate independently of Least Recently Used (LRU) status of the entries so that all entries are flushed.
REFERENCES:
patent: 3840862 (1974-10-01), Ready
patent: 4291196 (1981-09-01), Spaniol et al.
patent: 4426682 (1984-01-01), Riffe et al.
patent: 4802085 (1989-01-01), Levy et al.
patent: 4811203 (1989-03-01), Hamstra
patent: 5155824 (1992-10-01), Edenfield et al.
patent: 5307477 (1994-04-01), Taylor et al.
patent: 5524235 (1996-06-01), Larson et al.
patent: 5551001 (1996-08-01), Cohen et al.
patent: 5636354 (1997-06-01), Lear
patent: 5734861 (1998-03-01), Cohn et al.
patent: 5828844 (1998-10-01), Civanlar
patent: 5870763 (1999-02-01), Lomet
patent: 5933195 (1999-08-01), Florencio
patent: 5933593 (1999-08-01), Arun et al.
patent: 6003116 (1999-12-01), Morita et al.
patent: 6119205 (2000-09-01), Wicki et al.
patent: 6278716 (2001-08-01), Rubenstein
patent: 6289054 (2001-09-01), Rhee
patent: 6567929 (2003-05-01), Bhagavath et al.
patent: 6608841 (2003-08-01), Koodli
patent: 6766418 (2004-07-01), Alexander et al.
patent: 6782490 (2004-08-01), Maxemchuk et al.
patent: 6792047 (2004-09-01), Bixby
patent: 6804244 (2004-10-01), Anandakumar et al.
patent: 6865157 (2005-03-01), Scott et al.
patent: 6910148 (2005-06-01), Ho et al.
patent: 7114002 (2006-09-01), Okumura et al.
patent: 7164680 (2007-01-01), Loguinov
patent: 7180896 (2007-02-01), Okumura et al.
patent: 7224702 (2007-05-01), Lee
patent: 7234079 (2007-06-01), Cheng et al.
patent: 7257664 (2007-08-01), Zhang
patent: 7263075 (2007-08-01), Roh et al.
patent: 7296205 (2007-11-01), Curcio et al.
patent: 7324527 (2008-01-01), Fraas et al.
patent: 7373413 (2008-05-01), Bich
patent: 7392424 (2008-06-01), Ho et al.
patent: 7397759 (2008-07-01), Tan et al.
patent: 7532621 (2009-05-01), Birman et al.
patent: 7562277 (2009-07-01), Park et al.
patent: 7707303 (2010-04-01), Albers
patent: 2002/0114332 (2002-08-01), Apostolopoulos et al.
patent: 2002/0126711 (2002-09-01), Robinett et al.
patent: 2003/0101408 (2003-05-01), Martinian et al.
patent: 2003/0158899 (2003-08-01), Hughes
patent: 2003/0236903 (2003-12-01), Piotrowski
patent: 2004/0071128 (2004-04-01), Jang et al.
patent: 2004/0078624 (2004-04-01), Maxemchuk et al.
patent: 2004/0100937 (2004-05-01), Chen
patent: 2004/0114576 (2004-06-01), Itoh et al.
patent: 2004/0143672 (2004-07-01), Padmanabham et al.
patent: 2004/0196849 (2004-10-01), Aksu et al.
patent: 2004/0244058 (2004-12-01), Carlucci et al.
patent: 2005/0058131 (2005-03-01), Samuels et al.
patent: 2005/0074007 (2005-04-01), Samuels et al.
patent: 2005/0078698 (2005-04-01), Araya et al.
patent: 2005/0099499 (2005-05-01), Braunstein
patent: 2005/0198367 (2005-09-01), Ettikan
patent: 2005/0207406 (2005-09-01), Reme
patent: 2005/0249231 (2005-11-01), Khan
patent: 2005/0265346 (2005-12-01), Ho et al.
patent: 2005/0289623 (2005-12-01), Midani et al.
patent: 2006/0075084 (2006-04-01), Lyon
patent: 2006/0075443 (2006-04-01), Eckert
patent: 2006/0083263 (2006-04-01), Jagadeesan et al.
patent: 2006/0085551 (2006-04-01), Xie et al.
patent: 2006/0120378 (2006-06-01), Usuki et al.
patent: 2006/0126667 (2006-06-01), Smith et al.
patent: 2006/0143669 (2006-06-01), Cohen
patent: 2006/0159093 (2006-07-01), Joo et al.
patent: 2006/0187914 (2006-08-01), Gumaste et al.
patent: 2006/0188025 (2006-08-01), Hannuksela
patent: 2006/0242240 (2006-10-01), Parker et al.
patent: 2006/0242669 (2006-10-01), Wogsberg
patent: 2006/0279437 (2006-12-01), Luby
patent: 2007/0008934 (2007-01-01), Balasubramanian et al.
patent: 2007/0044130 (2007-02-01), Skoog
patent: 2007/0204320 (2007-08-01), Wu et al.
patent: 2007/0214490 (2007-09-01), Cheng et al.
patent: 2007/0268899 (2007-11-01), Cankaya
patent: 2007/0277219 (2007-11-01), Toebes et al.
patent: 2008/0062990 (2008-03-01), Oran
patent: 2008/0192839 (2008-08-01), Gahm et al.
patent: 2008/0225850 (2008-09-01), Oran
patent: 2008/0253369 (2008-10-01), Oran
patent: 2008/0256409 (2008-10-01), Oran et al.
patent: 2008/0267078 (2008-10-01), Farinacci
patent: 2008/0310435 (2008-12-01), Cagenius et al.
patent: 2009/0034627 (2009-02-01), Rodriguez
patent: 2009/0034633 (2009-02-01), Rodirguez
patent: 2009/0049361 (2009-02-01), Koren et al.
patent: 2009/0055540 (2009-02-01), Foti et al.
patent: 2009/0119722 (2009-05-01), VerSteeg
patent: 2009/0150715 (2009-06-01), Pickens
patent: 2009/0201803 (2009-08-01), Filsfils
patent: 2009/0201805 (2009-08-01), Begen
patent: 2009/0213726 (2009-08-01), Asati
patent: 2010/0005360 (2010-01-01), Begen
patent: 2010/0036962 (2010-02-01), Gahm
patent: 1271953 (2003-01-01), None
patent: 1581005 (2005-09-01), None
patent: 1608116 (2005-12-01), None
patent: 1670252 (2006-06-01), None
patent: 2008728919 (2008-02-01), None
patent: 7814245.2 (2009-05-01), None
patent: 2007814246 (2009-06-01), None
patent: 8731381.3 (2009-11-01), None
patent: 9718637 (1997-05-01), None
patent: 0035201 (2000-06-01), None
patent: 00/76113 (2000-12-01), None
patent: 0161909 (2001-08-01), None
patent: 2006031925 (2006-03-01), None
patent: 2006057606 (2006-06-01), None
patent: 2006107424 (2006-10-01), None
patent: 2008/000289 (2008-01-01), None
patent: 2008033644 (2008-03-01), None
patent: 2008033645 (2008-03-01), None
patent: 2008100725 (2008-08-01), None
patent: 2008112465 (2008-09-01), None
patent: 2009099847 (2009-08-01), None
Lee, Jung-Hoon, J. S. Lee, and S. D. Kim. “A selective temporal and aggressive spatial cache system based on time interval.” 2000 International Conference on Computer Design (IEEE), Proceedings, Sep. 17-20, 2000.
Rajamoni, Ramakrishnan, R. Bhagavathula, and R. Pendse. “Timing analysis of block replacement algorithms on disk caches.” 43rd IEEE Midwest Symposium on Circuits and Systems, Proceedings, Aug. 8-11, 2000.
Degalahal, et al., Analyzing Soft Errors in Leakage Optimized SRAM Design, Article, Jan. 2003, pp. 1-7, 16th International Conference on VLSI Design.
Zhang, Computing Cache Vulnerability to Transient Errors and Its Implication, Article, Oct. 2005, pp. 1-9, IEEE Computer Society.
Weaver, et al., Reducing The Soft-Error Rate Of A High-Performance Microprocessor, Article, 2004, pp. 30-37, IEEE Computer Society.
Li, et al., Soft Error and Energy Consumption Interactions: A Data Cache Perspective, Article, Aug. 9, 2004, pp. 1-6, ISLPED '04.
Supplementary European Search Report for EP08731381, Mar. 26, 2010, 7 pages.
Rey et al., “RTP Retransmission Payload Format—RFC 4588”, Jul. 1, 2006, 29 pages.
Handley, M. et al., “SIP: Session Initiation Protocol”, RFC 2543, Mar. 1999.
T. Friedman, “RTP Control Protocol Extended Reports (RTCP XR)”, RFC 3611, Nov. 2003.
Ott, “Extended RTP Profile for RTCP-based Feedback (RTP/AVPF)” draft-ieft-av-rtcp-feedback-01-txt., Nov. 21, 2001.
Approach Inc., “Streaming Media Technical Analysis”, Nov. 2000.
Turner, Jonathan S., “WDM Burst Switching” www.isoc.org/inet99/proceedings/4j/4j—3.htm, 1999.
GossamerThreads, “Channel Change Speed”, www.gossamer-threads.com/lists/engine?do=post—view—flat;post=13776, Sep. 12, 2003.
Nguyen, Thinh et.al., Protocols for Distributed Video Streaming, IEEE ICIP 2002.
Byers, John W. et al., Accessing Multiple Mirror Sites in Parallel: Using Tornado Codes to Speed Up Downloads, IEEE 1999.
Cisco Systems, Cisco Visual Quality Experience: Product Overview, www.cisco.com/en/US/partner/prod/collateral/video/ps7191/ps7126/product—data—sheet0900aecd8057f446.html, 2009.
Cisco Systems, Converge IP and DWDM Layers in the Core Network, http://www.cisco.com/en/US/prod/collateral/routers/ps5763/prod—white—paper0900aecd80395e03.html, 2007.
Silver Peak Systems, Inc., “Data Center Class WAN Optimization: Latency & Loss Mitigation”, www.silver-peak.com/Technology/latency—loss—mitigation.htm., 2010.
P. A. Chou and Z. Miao, “Rate-distortion optimized streaming of
Bernard Daniel J
Bragdon Reginald G
Cisco Technology Inc.
Stolowitz Ford Cowger LLP
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