Electrical computers and digital processing systems: processing – Processing control
Reexamination Certificate
2006-01-18
2008-03-11
Ellis, Richard L. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
C712S228000
Reexamination Certificate
active
07343478
ABSTRACT:
The present apparatus reduces hardware resources and improves data read throughput in an information processing apparatus employing the out-of-order instruction execution method. The apparatus includes: an arithmetic operation unit which executes a window switching instruction and an instruction relating to data stored in the current register or data held in the replacing buffer; and a control unit which transfers, if a window switching instruction is decoded at execution of the window switching instruction by the arithmetic operation unit, data of the register window which is to be specified by the current window pointer upon completion of execution of the window switching instruction, to the replacing buffer.
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Notice of Allowance dated Sep. 5, 2007 issued by the Korean Intellectual Property Office for Korean Application No. 10-2006-0017688.
Kan Ryuji
Yamashita Hideo
Yoshida Toshio
Ellis Richard L.
Fujitsu Limited
Petranek Jacob
Staas & Halsey , LLP
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