Register scoreboard logic with register read availability signal

Details Register scoreboard logic with register read availability signal Register scoreboard logic with register read availability signal

1998-06-02

2000-12-26

Kim, Kenneth S.

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

Scoreboarding, reservation station, or aliasing

712214, 712216, G06F 938

Patent

active

061675083

ABSTRACT:
Instruction issue logic is disclosed that assesses register availability. The issue logic comprises register scoreboard logic that includes destination register storage elements to identify destination registers of instructions queued for issue. An arbiter selects instructions for issue during a machine cycle from the queued instructions. Register-clean wires associated with each register are driven in response to the corresponding destination storage elements and the arbiter. These wires are used to identify the read-availability of registers. Specifically, such a logic system is capable of reflecting freed registers on the subsequent machine cycle so that previously issued instructions do not hinder queuing of new instructions, unless they require multiple cycles to complete. To increase speed of operation, single NMOS devices bridge the register-clean wires and the issue signal from the arbiter. Addition speed increase may be achieved by dividing the register scoreboard logic into odd and even register scoreboard arrays on either side of the arbiter.

REFERENCES:
patent: 5488730 (1996-01-01), Brown, III et al.
patent: 5790827 (1998-08-01), Leung
patent: 5918033 (1999-06-01), Heeb et al.
Gieseke, Bruce A. et al., "A 600MHz Superscalar RISC Microprocessor With Out-Of-Order Execution", Paper presented at meeting dated Feb. 7, 1997.
Keller, Jim, "The 21264: A superscalar Alpha Processor with Out-of-Order Execution", Paper presented at the Microprocessor Forum on Oct. 22-23, 1996.
Gwennap, Linley, "Digital 21264 Sets New Standard", Microprocessor Report, vol. 10, Issue 14, (Oct. 28, 1996).

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