Register data retention systems and methods during...

Details Register data retention systems and methods during... Register data retention systems and methods during...

2011-01-25

2011-01-25

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S040000, C326S046000

Reexamination Certificate

active

07876125

ABSTRACT:
Systems and methods provide register data retention techniques for a programmable logic device in accordance with one or more embodiments of the present invention. For example, in one embodiment, a programmable logic device includes a plurality of logic blocks adapted to generate user data during operation of the programmable logic device; a plurality of registers adapted to store the user data during a reprogramming operation of the programmable logic device; and configurable routing resources adapted to provide a programmed data path between the logic blocks and the registers.

REFERENCES:
patent: 5825662 (1998-10-01), Trimberger
patent: 7535253 (2009-05-01), Tang et al.

Affiliated with

Also associated with

Rating

Register data retention systems and methods during... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Register data retention systems and methods during..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Register data retention systems and methods during... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2694470