Refresh type semiconductor memory device having refresh...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S210130, C365S189011

Reexamination Certificate

active

06928016

ABSTRACT:
In the refresh type semiconductor memory device having a plurality of refresh type memory cells, for internally performing a refresh operation without an external command together with an input and output operation of data; the refresh type semiconductor memory device includes a refresh circuit having a compulsive refresh request signal generator that disables a refresh request cut-off signal, in response to a signal responding to an active transition of a write enable signal, and a dummy refresh signal generated in a read operation, so as to prevent a refresh fail causable in a consecutive write operation, whereby improving a write cycle time and minimizing a refresh fail at a high speed operation.

REFERENCES:
patent: 4984208 (1991-01-01), Sawada et al.
patent: 5206830 (1993-04-01), Isobe et al.
patent: 6298000 (2001-10-01), Kitade et al.
patent: 6324113 (2001-11-01), Tomita
patent: 6343043 (2002-01-01), Kai et al.
patent: 2001/0026493 (2001-10-01), Leung
patent: 2003/0112687 (2003-06-01), Tang

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