Refresh system for a dynamic memory

Details Refresh system for a dynamic memory Refresh system for a dynamic memory

1980-01-30

1982-01-26

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Data refresh

365229, G11C 700

Patent

active

043131808

ABSTRACT:
An electronic apparatus comprises a central processor unit (CPU) for controlling the operation of the electronic apparatus, and a dynamic random access memory (RAM). The CPU develops a refresh control signal for refreshing the memory data stored in the dynamic RAM. An additional refresh control circuit is provided outside of the CPU for developing another refresh control signal. The additional refresh control circuit is connected to receive the electric power from a backup battery included in the electronic apparatus. When the service interruption occurs, the additional refresh control circuit is enabled to maintain the memory data stored in the dynamic RAM.

REFERENCES:
patent: 3760379 (1973-09-01), Nibby et al.
patent: 4005395 (1977-01-01), Fosler et al.
patent: 4104734 (1978-08-01), Herndon

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