Refresh methods for RAM cells featuring high speed access

Details Refresh methods for RAM cells featuring high speed access Refresh methods for RAM cells featuring high speed access

2006-09-26

2006-09-26

Auduong, Gene (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S236000

Reexamination Certificate

active

07113439

ABSTRACT:
A method of operating a memory device including an array of cells formed in rows and columns that comprises providing a control signal, activating the control signal, the activated control signal including a first state and a second state, continuously performing access cycles in response to the first state of the activated control signal in one part of a period, and continuously performing refresh cycles in response to the second state of the activated control signal in another part of the period.

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