Refresh control method of a semiconductor memory device and...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S230060

Reexamination Certificate

active

11254722

ABSTRACT:
A refresh control method of a semiconductor memory device which controls a self-refresh operation to hold data in a memory array having a plurality of memory cells disposed at intersections of word lines corresponding to row addresses and bit lines corresponding to column addresses, comprising: a step for dividing the memory array into a holding area used as a copy source which includes memory cells on a predetermined number of word lines, and a copy area used as a copy destination which includes memory cells on word lines to which entire data of the holding area is to be copied, a step for executing copy operation in which data of each memory cell of the holding area is copied to one or more memory cells in the copy area on the same bit line or the same pair of bit lines before executing the self-refresh operation, and a step for executing the self-refresh operation in which a row address of the holding area is designated and a corresponding word line is selected and driven, and at the same time, one or more word lines in the copy area corresponding to the selected word line are selected and driven.

REFERENCES:
patent: 6449203 (2002-09-01), Cowles et al.
patent: 6449204 (2002-09-01), Arimoto et al.
patent: 6714476 (2004-03-01), Hsu et al.
patent: 6850449 (2005-02-01), Takahashi
patent: 2004-118938 (2004-04-01), None

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