Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
1999-02-22
2001-05-01
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S189050, C365S189060
Reexamination Certificate
active
06226205
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to integrated circuits and in particular to a reference voltage supply for an integrated circuit. Still more particularly, the present invention relates to a low impedance, low power reference voltage supply for an integrated circuit, such as a dynamic random access memory (DRAM), having high immunity to noise coupling.
2. Description of the Related Art
A conventional dynamic random access memory (DRAM) includes an array of memory cells in which each memory cell includes a pass transistor and a capacitor. The capacitor functions as a memory element, with the presence of a charge on the capacitor representing a binary one and the absence of a charge representing a binary zero, for example. Data bits are read from and written to individual memory cells via word (row) and bit (column) lines connected to the pass transistors.
In a typical DRAM implementation, the reference plates of the memory cell capacitors are precharged to a voltage intermediate the supply voltage and ground. For example, U.S. Pat. No. 5,255,232 to Foss et al. discloses that the reference plates of storage capacitors are precharged to half of the supply voltage in order to reduce voltage stress on the thin capacitor dielectrics. When precharging the reference plates of the capacitors, it is important that the plate reference voltage be immune to noise coupling so that noise does not couple through the storage capacitors and turn on the associated pass transistors, resulting in the loss of the data bits stored by the capacitors.
SUMMARY OF THE INVENTION
The present invention improves the immunity of a low impedance, low power reference voltage generator to noise coupling through the use of feedback control. In accordance with the present invention, a reference voltage generator, which may be utilized in an integrated circuit such as a dynamic random access memory (DRAM), includes a voltage divider connected to a voltage supply and a feedback buffer amplifier. The voltage divider, which determines the reference voltage, supplies at least one voltage output signal to the feedback buffer amplifier under control of a feedback control signal supplied by the feedback buffer amplifier. In at least one embodiment, the reference voltage generator further includes a delay element coupled between the voltage divider and the feedback buffer amplifier in-line with the feedback control signal and a low impedance output buffer that receives the voltage output signal from the voltage divider and supplies the reference voltage at an output node. When the reference voltage generator is implemented within a dynamic random access memory, the reference voltage is supplied to the reference plates of bit storage capacitors within the memory cells. The dielectrics of the bit storage capacitors can be further protected by including a clamping circuit within the reference voltage generator that maintains the output node at a voltage between the voltages of the two voltage supply terminals.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
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European Search Report.
Elms Richard
Galanthay Theodore E.
Jorgenson Lisa K.
Nguyen Tuan T.
STMicroelectronics Inc.
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