Static information storage and retrieval – Read/write circuit – Having fuse element
Reexamination Certificate
2000-06-13
2001-09-11
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Read/write circuit
Having fuse element
C365S201000, C365S189090
Reexamination Certificate
active
06288965
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device having a burn-in circuit. More particularly, the present invention relates to a semiconductor memory device having a burn-in circuit for supplying a burn-in voltage to at least one of circuit elements that has been incorporated in the memory device together with the other circuit elements, but is selectively extincted according to the particular circuit design of the semiconductor device.
2. Description of the Related Art
A conventional reference voltage generating circuit (Vref circuit) comprises a plurality of resistance adjusting fuses for controlling resistance of the circuit. The resistance is controlled by cutting one or some of these fuses, so that a reference voltage generating circuit capable of applying a certain voltage can be obtained.
FIG. 3A
shows an enlarged plan view of a fuse, in which wires
1
forming a circuit together with the fuse
2
are connected with opposite ends of the fuse
2
. When as shown in
FIG. 3B
, a laser beam
3
is applied to the fuse
2
, the fuse
2
melts to break with the circuit line consequently opened. In the field of manufacture of semiconductor devices, such a fuse is employed in a plural number in each of those semiconductor devices being manufactured so that at the time the semiconductor device is incorporated in a circuit that requires for the semiconductor device to exhibit a particular line resistance, one or some of the fuses in the semiconductor device may be extincted by radiation of a laser beam to allow the semiconductor device to exhibit such particular line resistance.
In a highly integrated semiconductor memory device, width of the fuse
2
used therein is so small that the laser beam
3
will not impinge exactly upon an intended site of the fuse
2
and may often impinge at a wrong site of the fuse
2
as shown in
FIG. 4A
,
4
B or
4
C. Specifically
FIG. 4A
illustrates the case in which the fuse
2
is not cut because of the laser beam impinging out of the fuser
2
.
FIG. 4B
illustrates the case in which the fuse
3
is partially cut as a result of the laser beam impinging upon the fuse
2
at a location offset from the intended site.
FIG. 4C
illustrates the case in which the wire
1
is cut as a result of the laser beam impinging upon such wire
1
.
If the line resistance exhibited by the reference voltage generating circuit employed in the semiconductor memory device is found falling within a permissible tolerance after one or some of the fuses
2
have been cut, the reference voltage generating circuit may be considered acceptable and free from a defect. That is, even if the reference voltage generating circuit comprises the insufficiently cut fuses
2
such as shown in
FIGS. 4B and 4C
, the resultant reference voltage generating circuit is generally treated as an acceptable product free from a defect, provided that the total resistance of the circuit is within the design tolerance.
However, where a partially cut fuse
2
such as shown in
FIG. 4B
remains employed in the reference voltage generating circuit, the cutting may progress and the fuse
2
may eventually break down during the use thereof on the active generating circuit. Once this occurs, the total resistance of all of those fuses used in the reference voltage generating circuit increases with passage of time of use thereof and finally the generating circuit will come to fail to supply a requisite reference voltage.
Also, in the conventional semiconductor memory device, it has been a problem that resistance of wire, for example, a bit line, shifts with passage of time of use thereof.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a semiconductor memory device wherein means is provided for avoiding any possible change of one or more fused used in a reference voltage generating circuit with passage of time and/or any possible change in line resistance with passage of time.
As a result of intensive researches conducted by the inventors of the present invention, the inventors have found that, by supplying a burn-in voltage across the fuses in the reference voltage generating circuit or across the wires to which a voltage is not supplied in a normal operation mode, a semiconductor device whose characteristic tends to change with passage of time can be eliminated.
That is, the present invention provides a reference voltage generating circuit having a fuse for controlling resistance, comprising a burn-in circuit for supplying a burn-in voltage between opposite terminals of the fuse when a control signal is inputted to the burn-in circuit.
In this reference voltage supplying circuit including the burn-in circuit, the burn-in voltage can be supplied across the fuse to which no voltage is supplied in a normal operating mode. This results in burn-in of the fuse employed in the reference voltage supplying circuit, and therefore, the semiconductor memory device with high reliability can be obtained.
It should be noted that the burn-in method in which the burn-in voltage is supplied across a fuse element used in a semiconductor device is disclosed in Japanese Laid-open Patent Publication No. 04-290458. According to this publication, the burn-in process is performed by supplying a higher voltage across the fuse element than the voltage which is supplied during the normal operation mode. The present invention, however, differs therefrom in that the burn-in voltage is supplied across the fuse to which no voltage is supplied during the normal operation mode.
Also, the present invention provides a reference voltage generating circuit, wherein the burn-in circuit includes a switching circuit for electrically disconnecting the opposite terminals of the fuse from the reference voltage generating circuit when the control signal is inputted to the burn-in circuit, and a voltage supply circuit for supplying a voltage between the opposite terminals of the fuse when the control signal is inputted to the burn-in circuit.
With the burn-in circuit, the burn-in of the fuse for controlling the resistance can be performed.
The switching circuit and the voltage supply circuit are preferably controlled by the same control signal. It is because that a highly integrated circuit can be obtained.
Also, the present invention provides a semiconductor memory device including the above-described reference voltage generating circuit.
Also, the present invention provides semiconductor memory device having a plurality of wires which are held at substantially the same electric potential during the operation mode. This memory device also includes a burn-in circuit for supplying a burn-in voltage between at least two wires when a control signal is inputted to the burn-in circuit.
In the semiconductor memory device including the burn-in circuit, the burn-in voltage can be supplied across the wire to which no voltage is supplied during the normal operating mode. This results in burn-in of the wire and, therefore, the semiconductor memory device with high reliability can be obtained.
Also, the present invention provides a semiconductor memory device, wherein the burn-in circuit includes a switching circuit for electrically disconnecting the wires from the semiconductor memory device when the control signal is inputted, and a voltage supply circuit for supplying a voltage between the wires when the control signal is inputted.
Both of the switching circuit and the voltage supply circuit are preferably controlled by the same control signal. It is because that highly integrated circuit can be obtained.
The present invention furthermore provides a burn-in method for reference voltage generating circuit having a fuse for controlling resistance. This method comprises a burn-in step of electrically disconnecting the opposite terminals of a fuse from a reference voltage generating circuit, and supplying voltage between the terminals of the fuse, and a selecting step of measuring the resistance of the fuse in order to select the reference voltage ge
Hara Motoko
Sawada Seiji
Hoang Huan
Mitsubishi Denki & Kabushiki Kaisha
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