Reference voltage generating circuit of sense amplifier using re

Details Reference voltage generating circuit of sense amplifier using re Reference voltage generating circuit of sense amplifier using re

1998-03-02

1999-12-14

Nelms, David

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

36518902, 365205, 365207, G11C 1604

Patent

active

060026162

ABSTRACT:
A reference voltage generating circuit of a sense amplifier using a residual data line which has the effect of reducing a layout and setting an accurate reference voltage by using a residual data line as a reference voltage, includes N memory cell arrays comprising cell blocks for storing data, N+1 sense amplifiers located over and below the memory cell arrays for reading out data from the selected cell block in the memory cell array to amplify to a predetermined level and output, a multiplexor for selectively outputting data outputted from the N+1 sense amplifiers in accordance with externally inputted data line select signal, a reference voltage generator for setting as a reference voltage a signal value of a non-adopted line of the sense amplifier according to the sense amplifier located at both ends of the memory cell array, and N data bus sense amplifiers for comparing data transmitted from the multiplexor with the reference voltage transmitted from the reference voltage generator.

REFERENCES:
patent: 5383162 (1995-01-01), Shirai et al.
patent: 5517462 (1996-05-01), Iwamoto et al.
patent: 5659517 (1997-08-01), Arimoto et al.
patent: 5717652 (1998-02-01), Ooishi
patent: 5812455 (1998-09-01), Iwata et al.
Toshiyuki Sakuta, et al., "Circuit Techniques for Multi-bit Parallel Testing of 64Mb DRAMs and Beyond"; 1992 Symposium on VLSI Circuits, Digest of Technical Papers; pp. vi, vii, 60 and 61; Jun. 4-6, 1996/Seattle.

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