Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1984-11-30
1987-01-27
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
365189, G11C 700
Patent
active
046398961
ABSTRACT:
A redundant row scheme having a protection circuit between the programmable decoder and the line driver of a redundant row system which provides a path to ground for discharging the row line and limits the voltage across the programmable decoder to prevent grow-back of the programmed fuses.
REFERENCES:
patent: 4250570 (1981-02-01), Tsang et al.
patent: 4290119 (1981-09-01), Masuda et al.
"New PROM Technology Provides High System Throughput"; W. Plummer; Intel Corporation; 33/3, pp. 1-5.
Brannigan Michael J.
Rutledge David L.
Harris Corporation
Popek Joseph A.
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