Redundant memory cell selecting circuit having fuses coupled to

Details Redundant memory cell selecting circuit having fuses coupled to Redundant memory cell selecting circuit having fuses coupled to

1997-09-24

1999-09-14

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

36523001, 36523006, G11C 1300

Patent

active

059532645

ABSTRACT:
An apparatus for selecting redundant memory cells in integrated circuit memory devices. The apparatus includes eight memory cell blocks, each of which includes a plurality of memory cell groups, a redundant memory cell group of a first set and a redundant memory cell group of a second set; and eight selecting fuse circuit blocks. Four of the selecting fuse circuit blocks are coupled to the memory cell blocks and adapted to select a redundant word line group of the first set of any of the eight memory cell blocks, and the other four selecting fuse circuit blocks are coupled to the memory cell blocks and adapted to select a redundant word line group of the second set of any of the eight memory cell blocks.

REFERENCES:
patent: 5317540 (1994-05-01), Furuyama

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