Redundant decision circuit for semiconductor memory device

Details Redundant decision circuit for semiconductor memory device Redundant decision circuit for semiconductor memory device

1999-05-12

2000-10-03

Elms, Richard

Static information storage and retrieval

Read/write circuit

Bad bit

365 96, G11C 700

Patent

active

061282340

ABSTRACT:
A redundancy decision circuit for specifying a redundant memory cell in a memory cell array when a normal cell is defective. The circuit includes a switching element, a fuse and a load circuit connected in series between high and low potential supplies. A switching driver drives the switching element. A hold circuit latches the potential at a node between the switching element and one of either the fuse and the load circuit. The circuit then generates a redundant decision signal.

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