Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2010-07-15
2011-11-22
Le, Dieu-Minh (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S011000
Reexamination Certificate
active
08065564
ABSTRACT:
First and second processing units execute the same control program to the same input data in parallel. An input/output unit generates the input data and receives one of two output data executed by the first and second processing units. A channel selection unit sends the input data to the first and second processing units and sends the one to the input/output unit by selecting the one from the two output data. In the first and second processing units, a control cycle synchronization unit generates a control cycle signal at a control cycle, a processor executes the control program, a data memory stores operation data including the input data, intermediate data being executed and output data executed by the processor. A diagnostics unit generates summary information by compressing the operation data and comparatively decides whether the summary information matches the other summary information of the other processing unit every control cycle.
REFERENCES:
patent: 6754846 (2004-06-01), Rasmussen et al.
patent: 6988221 (2006-01-01), Rasmussen et al.
patent: 2009/0044049 (2009-02-01), Luick
Fukai Eigo
Nakatani Hiroshi
Seto Naoto
Toko Makoto
Kabushiki Kaisha Toshiba
Le Dieu-Minh
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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