Redundant clock synthesizer

Details Redundant clock synthesizer Redundant clock synthesizer

2006-05-09

2006-05-09

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Multiple or variable intervals or frequencies

C327S152000, C327S298000, C327S156000, C326S010000, C375S356000, C331S049000, C331S055000

Reexamination Certificate

active

07043655

ABSTRACT:
A clock architecture employing redundant clock synthesizers is disclosed. In one embodiment, a computer system includes first and second clock boards. The first clock board may act as a master, generating a system clock signal, while the second clock board acts as a slave. The first clock board may monitor a phase difference between a first crystal clock signal and a feedback clock signal. If the phase difference exceeds a limit, the first crystal clock signal may be inhibited, preventing the first clock board from generating the system clock signal. The second clock board may monitor the system clock board in reference to a feedback clock signal. If the second clock board detects a predetermined number of consecutive missing clock edges, it may enable a second crystal clock signal, which may be used to generate a system clock signal.

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“Virtual Midplane Realizes Ultrafast Card Interconnects”; Electronic Design (ED Online # 1771); Dec. 9, 2002; Michael Fowler; Copyright © 2004; Penton Media, Inc.

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