Redundant circuit incorporated in semiconductor memory device

Static information storage and retrieval – Read/write circuit – Bad bit

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Details

365185, G11C 700, G11C 1134

Patent

active

050181041

ABSTRACT:
A redundant circuit incorporated in a non-volatile memory device has two memory transistors for memorizing a bit of address information one of which is used in a diagnostic operation of component circuits executed before the packaging and the other of which is used for memorizing a bit of address information assigned to a defective memory cell after the packaging, and, for this reason, the other memory transistor is free from the degradation due to the heat attack encountered in the packaging process.

REFERENCES:
patent: 4535259 (1985-08-01), Smarandoiu et al.
patent: 4567580 (1986-01-01), Varshney

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