Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-07-14
1995-06-20
Harvey, Jack B.
Static information storage and retrieval
Read/write circuit
Bad bit
36523003, G11C 700, G11C 2900
Patent
active
054266076
ABSTRACT:
A redundant circuit for a memory circuit having a plurality of memory cell blocks, which includes a redundant memory cell block for a predetermined one of the memory cell blocks. There is a redundancy decoder for producing a redundant memory cell selecting signal, and a block selecting signal generating circuit. The output of the block selecting signal generating circuit is arranged to be controlled by the redundant memory cell selecting signal for the predetermined memory cell block so as to relieve a faulty memory cell block by the redundant memory cell block of the predetermined memory cell block.
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Harvey Jack B.
Sharp Kabushiki Kaisha
Whitfield Michael A.
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