Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2001-03-05
2004-06-22
Thai, Xuan M. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C711S003000, C711S001000
Reexamination Certificate
active
06754762
ABSTRACT:
BACKGROUND
This invention relates to the operation of a bus in a computer backplane.
The circuitry and mechanical elements used to connect the boards of a computer system are commonly called a backplane, which contains a bus for communicating data between the components on the boards.
Different protocols or standards have been set for the bus, one example, the IEEE 1394, provides for a bus reset signal telling all the components to reinitialize their bus connection, which might happen in the event of a bus fault due to a problem with one of the components or a faulty backplane connection. Under this standard, the reset signal is applied to both channels (conductors) of the duplex bus. Each bus has two channels, one the strobe channel, the other for the data.
In the event of a persistent problem with the bus in some way, the system will lock up, requiring complete re-initialization, a manual, time consuming process. This type of system correction is not sufficient for high performance fault intolerant systems, such as space craft controls, that must operate automatically with minimal interruption.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an improved bus connection in a computer system.
According to the present invention the backplane contains a pair of duplex buses. Each component contains a switch to select one of the buses (the active bus) and a controller which controls the state of the switch as a function of the signal characteristics on the bus that is in operation. A component, for instance, a master controller on the bus, is programmed to detect a fault in the operation of the active bus, switching to the inactive bus and transmitting a bus reset signal on the inactive bus. The other controllers in the other components on detecting the reset signal switch to the inactive bus, now the active bus. The bus reset signal is used to switch between buses rather than reset the active bus, and this provides a more rapid and reliable connection between the components on the bus. Each controller is programmed or hard wired to detect the bus reset and operate the switch to change to the inactive bus (making it active).
A feature of the invention, a standard backplane and protocol can be used with commercial processors and peripherals.
Other objects, benefits and features of the invention will apparent to one of ordinary skill in the art from the drawing and following description.
REFERENCES:
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patent: 5828613 (1998-10-01), Hatakeyama et al.
patent: 6374322 (2002-04-01), Saze et al.
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patent: 6564274 (2003-05-01), Heath et al.
patent: 6614752 (2003-09-01), Parrish et al.
patent: 2002/0032825 (2002-03-01), Saze et al.
Greenstien Robert E.
Honeywell International , Inc.
Thai Xuan M.
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