Redundancy in series grouped memory architecture

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S145000

Reexamination Certificate

active

06856560

ABSTRACT:
An improved redundancy scheme for chained memory architecture is disclosed. The redundancy scheme comprises including redundant cells as part of the memory chain. As such, a redundant cell is used to repair a defective cell within the chain. This eliminates the need in conventional chained architecture to replace the whole memory block when there is a defective cell.

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patent: 6525974 (2003-02-01), Neuhold et al.

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