Redundancy circuits for semiconductor memory

Details Redundancy circuits for semiconductor memory Redundancy circuits for semiconductor memory

2007-05-29

2007-05-29

Dinh, Son (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

Reexamination Certificate

active

11108179

ABSTRACT:
A semiconductor random access memory device has an array of normal memory and an array of dummy memory cells. The array of the dummy memory cells are controlled in order to form a redundant twin-cell structure that includes at least one of the dummy memory cells.

REFERENCES:
patent: 5022006 (1991-06-01), Fifield et al.
patent: 5495445 (1996-02-01), Proebsting
patent: 5945702 (1999-08-01), Nakanishi
patent: 6292383 (2001-09-01), Worley
patent: 6304499 (2001-10-01), Pöchmüller
patent: 6426269 (2002-07-01), Haffner et al.
patent: 6865124 (2005-03-01), Takase
patent: 2003/0043645 (2003-03-01), Pinney

Affiliated with

Also associated with

Rating

Redundancy circuits for semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Redundancy circuits for semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Redundancy circuits for semiconductor memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3786360