Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1994-12-06
1996-10-15
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Bad bit
36523006, G11C 700, G11C 2900
Patent
active
055661149
ABSTRACT:
A redundancy circuitry for a semiconductor memory device comprising a matrix of memory elements and a plurality of programmable non-volatile memory registers. The non-volatile memory registers being programmable to store addresses of defective memory elements that must be replaced by redundancy memory elements. The redundancy circuitry comprises a combinatorial circuit supplied by address signals and supplying the non-volatile registers with an inhibition signal for inhibiting the selection of redundancy memory elements when a memory element of the matrix is addressed whose address coincides with the address stored in a non-programmed memory register.
REFERENCES:
patent: 4376300 (1983-03-01), Tsang
patent: 4745582 (1988-05-01), Fukushi
patent: 4862416 (1989-08-01), Takeuchi
patent: 4947378 (1990-08-01), Jinbo
patent: 5381370 (1995-01-01), Lacey
Golla Carla M.
Pascucci Luigi
Carlson David V.
Mai Son
Nelms David C.
Santarelli Bryan A.
SGS--Thomson Microelectronics S.r.l.
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