Redundancy circuit in semiconductor memory device

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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Reexamination Certificate

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11262105

ABSTRACT:
A redundancy circuit in a semiconductor memory device comprises a fuse set controller configured to output a redundancy enable signal enabled according to applied address signals; a redundant selector; a spare redundant selector; and a spare fuse controller configured to be controlled by the redundancy enable signal, and to output a selection control signal that selects at least one of the redundant selector and the spare redundant selector in accordance with an internal fuse option.

REFERENCES:
patent: 6041000 (2000-03-01), McClure et al.
patent: 6404683 (2002-06-01), Yumoto
patent: 6731560 (2004-05-01), Yoon et al.
patent: 6771555 (2004-08-01), Kang
patent: 0177407 (1998-11-01), None

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