Redundancy circuit for semiconductor memory device

Details Redundancy circuit for semiconductor memory device Redundancy circuit for semiconductor memory device

1992-04-27

1994-06-07

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Bad bit

365201, 307219, 307441, G11C 700

Patent

active

053195990

ABSTRACT:
A redundancy circuit for a semiconductor memory device has a first switching element composed of a nonvolatile memory cell and a second switching element composed of a data writtable and erasable element such as an EPROM. The circuit further has a test mode setting circuit which outputs an operation mode setting signal based on a signal inputted to a test terminal, and a switching element control circuit which controls the selection of the first and/or second switching elements based on the operation mode setting signal. A NOR circuit outputs a switching-signal as an output signal when switching data is written into at least one of the first and second switching elements. The switching data can be temporarily written into the second switching element even after assembly into the product has been completed, so that various kinds of inspections with the use of the redundancy circuit are possible.

REFERENCES:
patent: 4532611 (1985-07-01), Countryman, Jr.
patent: 4567580 (1986-01-01), Varshney
patent: 5018104 (1991-05-01), Urai

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