Redundancy circuit and semiconductor device using the same

Details Redundancy circuit and semiconductor device using the same Redundancy circuit and semiconductor device using the same

2005-08-16

2005-08-16

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S225700, C365S230060

Reexamination Certificate

active

06930935

ABSTRACT:
A redundancy control circuit includes a redundancy decoder and a decoder killer circuit. The redundancy decoder includes a plurality of fuse circuits corresponding to a plurality of determination signals which are previously activated, and each of the plurality of fuse circuits contains a plurality of fuse sections each containing a fuse. The decoder killer circuit generates a killer signal when at least one of the plurality of determination signals is active, and the killer signal is outputted to an external unit in a first check mode. One of the plurality of fuse circuits is selected and determination signals corresponding to non-selected fuse circuits are inactivated. A specific fuse section of the selected fuse circuit inactivates the determination signal to provide indication of whether the fuse section is cut.

REFERENCES:
patent: 4791319 (1988-12-01), Tagami et al.
patent: 3-22298 (1991-01-01), None
patent: 4-205897 (1992-07-01), None
patent: 2002-133895 (2002-05-01), None

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